Gallium nitride (GaN)-based optoelectronic and electronic devices are of tremendous commercial importance. The quality and reliability of these devices, however, is compromised by high defect levels, particularly threading dislocations, grain boundaries, and strain in semiconductor layers of the devices. Threading dislocations can arise from a lattice mismatch of GaN-based semiconductor layers to a non-GaN substrate such as sapphire or silicon carbide. Grain boundaries can arise from the coalescence fronts of epitaxially-overgrown layers. Additional defects can arise from thermal expansion mismatch, impurities, and tilt boundaries, depending on the details of the growth of the layers.
The presence of defects has a deleterious effect on epitaxially-grown layers. Such effect includes compromising electronic device performance. To overcome these defects, techniques have been proposed that require complex, tedious fabrication processes to reduce the concentration and/or impact of the defects. While a substantial number of conventional growth methods for gallium nitride crystals have been proposed, limitations still exist. That is, conventional methods still merit improvement to be cost effective and efficient.
Progress has been made in the growth of large-area gallium nitride crystals with considerably lower defect levels than heteroepitaxial GaN layers. However, most techniques for growth of large-area GaN substrates involve GaN deposition on a non-GaN substrate such as sapphire or GaAs. This approach generally gives rise to threading dislocations at average concentrations of 105-107 cm−2 over the surface of thick boules, as well as significant bow, stress, and strain. Reduced concentrations of threading dislocations are desirable for a number of applications. Bow, stress, and strain can cause low yields when slicing the boules into wafers, and can make the wafers susceptible to cracking during downstream processing, and may also negatively impact device reliability and lifetime. Most large area substrates are manufactured by vapor-phase methods such as hydride vapor phase epitaxy (HVPE), which are relatively expensive. Ammonothermal crystal growth has a number of advantages over HVPE as a means for manufacturing GaN boules. However, ammonothermal manufacturing capabilities remain limited and substrate costs to date are higher than HVPE. Flux crystal also has a number of attractive features for growth of large area GaN boules. However, flux manufacturing capabilities remain very limited and GaN substrates synthesized by flux methods are not yet available commercially.
To the extent that nitride substrate costs remain high, particularly for large-area wafers, it would be extremely useful to be able to reuse the wafers so that the net wafer cost is greatly reduced. In addition, alternate means to CMP for removal of subsurface damage is desirable.
From the above, it can be appreciated that techniques for reducing the net usage cost of nitride wafers are highly desirable.